A 15-GHz reconfigurable calibration-free frequency synthesizer is proposed for linear frequencymodulated continuous-wave (FMCW) chirp generation. By utilizing the type-III PLL architecture to adaptively track the ramp, the chirp linearity is improved remarkably for wide bandwidth operation. In addition, to further reduce the quantization noise from delta-sigma modulation (DSM) and suppress the in-band noise folding effect, a nested-PLL architecture is leveraged. Implemented in a 65-nm CMOS process, the proposed FMCW chirp generator consumes 55 mW power and supports triangular and sawtooth waveforms. Measurement results show that the phase noise of 15.17 GHz carrier frequency is -97.8 dBc/Hz at 1 MHz offset. Without any efforts in calibration, the chirp generator achieves 1 GHz chirp bandwidth and 25 μs chirp period with a root-mean-square (RMS) frequency error as low as 341 kHz.